EEE525 VLSI Design

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Cadence

  • Cadence setup on Server
Configuration path: /usr/local/cadence2/NCSU
  • vlsi2.eas.asu.edu information
  • VLSI Readme, with Cadence instructions
  • > vlsi2 Read-me file

Tutorials

  • > Tutorial at WPI
  • Tutorial, VLSI
  • Tutorial on Virtuoso Schematic editor from OSU, layout with ALU
  • Berkeley Virtuoso tutorial
  • Cadence FAQ

Design Rules

  • Mosis design rules (SCN5M Deep)
Retrieved from "https://www.esoterum.org/mw/index.php?title=EEE525_VLSI_Design&oldid=1540"

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  • This page was last edited on 31 January 2008, at 13:33.
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