CSE591 Low Power Architecture/Project II

From esoterum.org

< CSE591 Low Power Architecture

Revision as of 23:51, 17 February 2007 by Baker (talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Jump to navigation Jump to search

Addressing the power cost of switching overhead in Dynamic Voltage and Frequency Scaling processors.

DVFS information from the University of Colorado

[http://moss.csc.ncsu.edu/~mueller/ftp/pub/mueller/papers/lctes05.pdf Zhu, Mueller, Feedback EDF Scheduling Exploiting Hardware-Assisted

Asynchronous Dynamic Voltage Scaling, North Carolina State University]

Retrieved from "https://www.esoterum.org/mw/index.php?title=CSE591_Low_Power_Architecture/Project_II&oldid=144"

Navigation menu