DVFS: Difference between revisions

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[http://en.wikipedia.org/wiki/DVFS DVFS, Wikipedia]
[http://en.wikipedia.org/wiki/DVFS DVFS, Wikipedia]
An article that need to be written.
An article that need to be written.
=== Video Decoding ===
*Mesarina, M. and Turner, Y. 2003. [http://portal.acm.org/citation.cfm?id=959284# Reduced energy decoding of MPEG streams]. Multimedia Syst. 9, 2 (Aug. 2003), 202-213.
*Lee, B., Nurvitadhi, E., Dixit, R., Yu, C., and Kim, M. 2005. [http://web.engr.oregonstate.edu/~benl/Publications/Journals/JSA_DVS05.pdf Dynamic voltage scaling techniques for power efficient video decoding]. J. Syst. Archit. 51, 10-11 (Oct. 2005), 633-652.
*Pouwelse, J., Langendoen, K., and Sips, H. 2001. [http://portal.acm.org/citation.cfm?id=381701# Dynamic voltage scaling on a low-power microprocessor]. In Proceedings of the 7th Annual international Conference on Mobile Computing and Networking (Rome, Italy). MobiCom '01. ACM, New York, NY, 251-259.


=== Switching Overhead ===
=== Switching Overhead ===
*Johan De Gelas. [http://www.anandtech.com/print/2919 Dynamic Power Management: A Quantitative Approach]. Online: AnandTech.com. January 18, 2010.
:-Xeon C-state transition times
:-P-state frequency example, (10 133MHz steps from 1.2GHz to 2.53Ghz)
:-"On dual-core Athlon X2 and Phenom I, it was '''for example impossible to use DVFS and get decent HD-video decoding.''' There are three important performance problems with dynamic power management:
:Transitioning from one P-state to another takes a while, especially if you scale up. Active cores will probe idle or lower P-state cores quite frequently. The OS power manager has to predict whether or not the process will need more processing power soon or not. As a result the OS transitions a lot slower than the hardware."
*[http://acpi.sourceforge.net/documentation/processor.html Getting c-state and p-state info in linux]
*[http://acpi.sourceforge.net/documentation/processor.html Getting c-state and p-state info in linux]


*[http://www.intel.co.jp/Assets/en_US/PDF/datasheet/323369.pdf Intel Xeon Processor 5600 Series, Datasheet Volume I]. March 2010.
*[http://www.intel.com/Assets/en_US/PDF/datasheet/323369.pdf Intel Xeon Processor 5600 Series, Datasheet Volume I]. March 2010.
:-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition."
:-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition."
:Power consumption table for 5600 by C-state
:Power consumption table for 5600 by C-state
Line 24: Line 37:
:-Gives wakeup times, but don't know where they came from
:-Gives wakeup times, but don't know where they came from
:-[http://www.techarp.com/showarticle.aspx?artno=420&pgno=7 example power performance by P-states]
:-[http://www.techarp.com/showarticle.aspx?artno=420&pgno=7 example power performance by P-states]
*[http://www.google.com/url?sa=t&source=web&cd=11&ved=0CBYQFjAAOAo&url=http%3A%2F%2Fwww.cs.pitt.edu%2F~kirk%2Fcs3150spring2010%2FShiminChen.pptx&ei=ACJ6TOmCBoH0swOLyKjuCg&usg=AFQjCNFwzbg7RmydeiafeOk9czxVGx0MHQ&sig2=2mweki_MMkUFrZYusUWJDQ Power states overview slides from University of Pittsburg], example of c-state selections over time


=== DVFS Project Resources ===
=== DVFS Project Resources ===
Line 34: Line 49:


=== DVFS Papers ===
=== DVFS Papers ===
*Burd, T.; Pering, T.; Stratakos, A.; Brodersen, R.; , [http://ieeexplore.ieee.org.ezproxy1.lib.asu.edu/search/srchabstract.jsp?tp=&arnumber=839787&queryText%3Da+dynamic+voltage+scaled+microprocessor+system%26openedRefinements%3D*%26searchField%3DSearch+All A dynamic voltage scaled microprocessor system]. Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International , vol., no., pp.294-295, 466, 2000.
*Isci, Martonosi, Buyuktosunoglu, [http://www.princeton.edu/~canturk/ETC/papers/IEEEmicro_SepOct05/canturkIEEEmicro.pdf "Long-term Workload Phases: Duration Predictions and Applications to DVFS]
*Isci, Martonosi, Buyuktosunoglu, [http://www.princeton.edu/~canturk/ETC/papers/IEEEmicro_SepOct05/canturkIEEEmicro.pdf "Long-term Workload Phases: Duration Predictions and Applications to DVFS]
::Prediction and switching overhead
::Prediction and switching overhead
*[http://delivery.acm.org.ezproxy1.lib.asu.edu/10.1145/290000/280790/p76-pering.pdf?key1=280790&key2=8975581711&coll=portal&dl=ACM&CFID=10949569&CFTOKEN=52685087 "The Simulation and Evaluation of Dynamic Voltage Scaling Algorithms"], 1998
*[http://delivery.acm.org.ezproxy1.lib.asu.edu/10.1145/290000/280790/p76-pering.pdf?key1=280790&key2=8975581711&coll=portal&dl=ACM&CFID=10949569&CFTOKEN=52685087 "The Simulation and Evaluation of Dynamic Voltage Scaling Algorithms"], 1998
*[http://www.arm.com/pdfs/Intrinsyc_IEM_Benchmarking_for_WinCE.pdf "Intelligent Energy Manager (IEM) Benchmarking on a Freescale’s iMX31 Multimedia Processor"], SEP 2006
*[http://www.arm.com/pdfs/Intrinsyc_IEM_Benchmarking_for_WinCE.pdf "Intelligent Energy Manager (IEM) Benchmarking on a Freescale’s iMX31 Multimedia Processor"], SEP 2006
*[http://www.csl.cornell.edu/~lijian/docs/lij_power_hpca06.pdf "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"]
*[http://www.csl.cornell.edu/~lijian/docs/lij_power_hpca06.pdf "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"]
*Li, J.; Martinez, J.F.; , [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1598114&tag=1 Dynamic power-performance adaptation of parallel computation on chip multiprocessors]. High-Performance Computer Architecture, 2006. The Twelfth International Symposium on , vol., no., pp. 77- 87, 11-15 Feb. 2006
*M. Pedram, K. Choi, R. Soma, [http://ieeexplore.ieee.org/iel5/43/30006/01372658.pdf "Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times"]
*M. Pedram, K. Choi, R. Soma, [http://ieeexplore.ieee.org/iel5/43/30006/01372658.pdf "Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times"]
*[http://systems.cs.colorado.edu/EnergyEfficientComputing/os_power_computing.htm "DVFS information from the University of Colorado"]
*[http://systems.cs.colorado.edu/EnergyEfficientComputing/os_power_computing.htm "DVFS information from the University of Colorado"]
*Zhu, Mueller, [http://moss.csc.ncsu.edu/~mueller/ftp/pub/mueller/papers/lctes05.pdf "Feedback EDF Scheduling Exploiting Hardware-Assisted Asynchronous Dynamic Voltage Scaling, North Carolina State University"]
 
*Zhu, Mueller, [http://moss.csc.ncsu.edu/~mueller/ftp/pub/mueller/papers/lctes05.pdf "Feedback EDF Scheduling  
Exploiting Hardware-Assisted Asynchronous Dynamic Voltage Scaling, North Carolina State University"]


=== DVFS in Linux ===
=== DVFS in Linux ===
*[http://www.public.asu.edu/~ashriva6/teaching/LPCA/Readings/05B-01.pdf "Mitigating Amdahl’s Law Through EPI Throttling"]
*[http://www.public.asu.edu/~ashriva6/teaching/LPCA/Readings/05B-01.pdf "Mitigating Amdahl’s Law Through EPI Throttling"]

Latest revision as of 01:55, 10 September 2010

DVFS, Wikipedia An article that need to be written.

Video Decoding

Switching Overhead

-Xeon C-state transition times
-P-state frequency example, (10 133MHz steps from 1.2GHz to 2.53Ghz)
-"On dual-core Athlon X2 and Phenom I, it was for example impossible to use DVFS and get decent HD-video decoding. There are three important performance problems with dynamic power management:
Transitioning from one P-state to another takes a while, especially if you scale up. Active cores will probe idle or lower P-state cores quite frequently. The OS power manager has to predict whether or not the process will need more processing power soon or not. As a result the OS transitions a lot slower than the hardware."
-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition."
Power consumption table for 5600 by C-state
-p. 167: "Processor C-State Power Specifications" table power consumption by C-state
Power consumption table for several processors at different power management C-states
-20us transition overhead for all C-states?
-Overview charts on C-State configuration details wakeup times and power consumption
-Gives wakeup times, but don't know where they came from
-example power performance by P-states

DVFS Project Resources

Concise references for DVFS project from 2003 using speedstep on an IBM Thinkpad
Good linux kernel reference
  • Topic: Addressing the power cost of switching overhead in DVFS processors.

Experimental Setup

DVFS Papers

  • Burd, T.; Pering, T.; Stratakos, A.; Brodersen, R.; , A dynamic voltage scaled microprocessor system. Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International , vol., no., pp.294-295, 466, 2000.
Prediction and switching overhead

Exploiting Hardware-Assisted Asynchronous Dynamic Voltage Scaling, North Carolina State University"]

DVFS in Linux

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