Difference between revisions of "Reconfigurable Computing"

Revision as of 19:37, 15 January 2008

RC: reconfigurable computing

HPRC: high performance reconfigurable computing

RH: reconfigurable hardware

R. Tessier and W. Burleson, "Reconfigurable Computing and Digital Signal Processing: Past, Present, and Future", Programmable Digital Signal Processors (online via ASU Library), Yu Wen Hu, ed., Marcel Dekker, New York, N.Y., 2002.

-UMass, Amherst

R. Tessier and W. Burleson, "Reconfigurable Computing and Digital Signal Processing: A Survey", Journal of VLSI Signal Processing, May/June 2001, pp. 7-27

-UMass, Amherst

(5.1) Wenyin Fu, Katherine Compton, "A Simulation Platform for Reconfigurable Computing Research", Field Programmable Logic and Applications, 2006. FPL '06. International Conference on 28-30 Aug. 2006 Page(s):1 - 7

-UWisconsin, Madison

(5.4) M. Vuletic, L. Pozzi, P. Ienne, "Programming transparency and portable hardware interfacing: towards general-purpose reconfigurable computing", 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004. Page(s):339 - 351

-Swiss Federal Institute of Technology Lausanne, Processor Architecture Laboratory

(5.3) Proshanta Saha, Tarek El-Ghazawi, "Software/Hardware Co-Scheduling for Reconfigurable Computing Systems", International Symposium on Field-Programmable Custom Computing Machines, 2007

-George Washington University

-George Washington University

(5.6) M.D. Galanis, G. Dimitroulakos, C.E. Goutis, "Speedups from partitioning critical software parts to coarse-grain reconfigurable hardware", 16th IEEE International Conference on Application-Specific Systems, Architecture Processors, 23-25 July 2005 Page(s):50 - 55

-University of Patras, Greece

(5.5) L.S. Indrusiak, F. Lubitz, R. Reis, M. Glesner, "Ubiquitous access to reconfigurable hardware: application scenarios and implementation issues" Design, Automation and Test in Europe Conference and Exhibition, 2003 Page(s):940 - 945

-Instituto de Informática, UFRGS, Porto Alegre, Brazil

-Microelectronic Systems Institute, TU Darmstadt, Darmstadt, Germany

(5.7) C. Claus, J. Zeppenfeld, F. Muller, W. Stechele, "Using Partial-Run-Time Reconfigurable Hardware to accelerate Video Processing in Driver Assistance System", Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
(5.8) Lars Bauer, Muhammad Shafique, Jörg Henkel, "Efficient Resource Utilization for an Extensible Processor through Dynamic Instruction Set Adaptation", 5th Workshop on Application Specific Processors (WASP'07), Salzburg, Austria, October 2007

-Karlsruhe

(5.9) Lars Bauer, Muhammad Shafique, Dirk Teufel, Jörg Henkel, "A Self-Adaptive Extensible Embedded Processor", IEEE/ACM First International Conference on Self-Adaptive and Self-Organizing Systems (SASO'07)

-Karlsruhe

Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne Burleson, "A Reconfigurable, Power-Efficient Adaptive Viterbi Decoder", IEEE Transactions on VLSI Systems, vol. 13, no. 4, April 2005, pp. 484-488

-UMass, Amherst

Last printed: 5.9

@@ Line 5: / Line 5: @@
 *[http://en.wikipedia.org/wiki/Reconfigurable_computing Reconfigurable Computing on Wikipedia]
-*[http://ces.univ-karlsruhe.de/public/index.htm
+*[http://ces.univ-karlsruhe.de/~henkel/ Henkel Embedded Systems page at Karlsruhe]
 *[http://ces.univ-karlsruhe.de/RISPP/Overview.htm Overview: RISPP: Rotating Instruction Set Processing Platform]
 *[http://ces.univ-karlsruhe.de/RISPP/AtomMoleculeModel_Overview.htm Atom/Molecule Concept from RISPP: Rotating Instruction Set Processing Platform website]