Difference between revisions of "DVFS"

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(Switching Overhead)
(DVFS Papers)
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*[http://www.arm.com/pdfs/Intrinsyc_IEM_Benchmarking_for_WinCE.pdf "Intelligent Energy Manager (IEM) Benchmarking on a Freescale’s iMX31 Multimedia Processor"], SEP 2006
 
*[http://www.arm.com/pdfs/Intrinsyc_IEM_Benchmarking_for_WinCE.pdf "Intelligent Energy Manager (IEM) Benchmarking on a Freescale’s iMX31 Multimedia Processor"], SEP 2006
 
*[http://www.csl.cornell.edu/~lijian/docs/lij_power_hpca06.pdf "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"]
 
*[http://www.csl.cornell.edu/~lijian/docs/lij_power_hpca06.pdf "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"]
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*Li, J.; Martinez, J.F.; , [http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1598114&tag=1 Dynamic power-performance adaptation of parallel computation on chip multiprocessors]. High-Performance Computer Architecture, 2006. The Twelfth International Symposium on , vol., no., pp. 77- 87, 11-15 Feb. 2006
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*M. Pedram, K. Choi, R. Soma, [http://ieeexplore.ieee.org/iel5/43/30006/01372658.pdf "Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times"]
 
*M. Pedram, K. Choi, R. Soma, [http://ieeexplore.ieee.org/iel5/43/30006/01372658.pdf "Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times"]
 
*[http://systems.cs.colorado.edu/EnergyEfficientComputing/os_power_computing.htm "DVFS information from the University of Colorado"]
 
*[http://systems.cs.colorado.edu/EnergyEfficientComputing/os_power_computing.htm "DVFS information from the University of Colorado"]

Revision as of 01:55, 10 September 2010

DVFS, Wikipedia An article that need to be written.

Video Decoding

Switching Overhead

-Xeon C-state transition times
-P-state frequency example, (10 133MHz steps from 1.2GHz to 2.53Ghz)
-"On dual-core Athlon X2 and Phenom I, it was for example impossible to use DVFS and get decent HD-video decoding. There are three important performance problems with dynamic power management:
Transitioning from one P-state to another takes a while, especially if you scale up. Active cores will probe idle or lower P-state cores quite frequently. The OS power manager has to predict whether or not the process will need more processing power soon or not. As a result the OS transitions a lot slower than the hardware."
-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition."
Power consumption table for 5600 by C-state
-p. 167: "Processor C-State Power Specifications" table power consumption by C-state
Power consumption table for several processors at different power management C-states
-20us transition overhead for all C-states?
-Overview charts on C-State configuration details wakeup times and power consumption
-Gives wakeup times, but don't know where they came from
-example power performance by P-states

DVFS Project Resources

Concise references for DVFS project from 2003 using speedstep on an IBM Thinkpad
Good linux kernel reference
  • Topic: Addressing the power cost of switching overhead in DVFS processors.

Experimental Setup

DVFS Papers

  • Burd, T.; Pering, T.; Stratakos, A.; Brodersen, R.; , A dynamic voltage scaled microprocessor system. Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International , vol., no., pp.294-295, 466, 2000.


Prediction and switching overhead


DVFS in Linux