Difference between revisions of "DVFS"
From esoterum.org
| Line 5: | Line 5: | ||
*[http://www.intel.co.jp/Assets/en_US/PDF/datasheet/323369.pdf Intel Xeop Processor 5600 Series, Datasheet Volume I]. March 2010. | *[http://www.intel.co.jp/Assets/en_US/PDF/datasheet/323369.pdf Intel Xeop Processor 5600 Series, Datasheet Volume I]. March 2010. | ||
:-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition." | :-p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition." | ||
| + | :Power consumption table for 5600 by C-state | ||
*Adrian Hoban. [http://download.intel.com/design/intarch/papers/323671.pdf Designing Real-Time Solutions on Embedded Intel® Architecture Processors]. Intel Corporation. May, 2010. | *Adrian Hoban. [http://download.intel.com/design/intarch/papers/323671.pdf Designing Real-Time Solutions on Embedded Intel® Architecture Processors]. Intel Corporation. May, 2010. | ||
Revision as of 19:55, 28 August 2010
DVFS, Wikipedia An article that need to be written.
Contents
Switching Overhead
- Intel Xeop Processor 5600 Series, Datasheet Volume I. March 2010.
- -p. 168: "Processor core (including shared cache) is unavailable for less than 2us during the frequency transition."
- Power consumption table for 5600 by C-state
- Adrian Hoban. Designing Real-Time Solutions on Embedded Intel® Architecture Processors. Intel Corporation. May, 2010.
- Power consumption table for several processors at different power management C-states
DVFS Project Resources
- Concise references for DVFS project from 2003 using speedstep on an IBM Thinkpad
- Good linux kernel reference
- Topic: Addressing the power cost of switching overhead in DVFS processors.
Experimental Setup
DVFS Papers
- Isci, Martonosi, Buyuktosunoglu, "Long-term Workload Phases: Duration Predictions and Applications to DVFS
- Prediction and switching overhead
- "The Simulation and Evaluation of Dynamic Voltage Scaling Algorithms", 1998
- "Intelligent Energy Manager (IEM) Benchmarking on a Freescale’s iMX31 Multimedia Processor", SEP 2006
- "Dynamic Power-Performance Adaptation of Parallel Computation on Chip Multiprocessors"
- M. Pedram, K. Choi, R. Soma, "Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Tradeoff Based on the Ratio of Off-Chip Access to On-Chip Computation Times"
- "DVFS information from the University of Colorado"
- Zhu, Mueller, "Feedback EDF Scheduling Exploiting Hardware-Assisted Asynchronous Dynamic Voltage Scaling, North Carolina State University"
