Code Overlay
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Revision as of 18:57, 23 July 2009 by Baker (Talk | contribs) (New page: *M. Verma, P. Marwedel. [http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=01664902 Overlay techniques for scratchpad memories in low power embedded processors]. Very Large Scale Integra...)
- M. Verma, P. Marwedel. Overlay techniques for scratchpad memories in low power embedded processors. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Aug. 2006 Volume: 14, Issue: 8 On page(s): 802-815
- -Dept. of Comput. Sci., Dortmund Univ.
- Sumesh Udayakumaran and Angel Dominguez and Rajeev Barua. Dynamic allocation for scratch-pad memory using compile-time decisions. ACM Transactions on Embedded Computing Systems (TECS). Volume 5 , Issue 2 Pages: 472 - 511. May 2006
- -University of Maryland, College Park, MD
- Bernhard Egger and Chihun Kim and Choonki Jang and Yoonsung Nam and Jaejin Lee and Sang Lyul Min. A dynamic code placement technique for scratchpad memory using postpass optimization. International Conference on Compilers, Architecture and Synthesis for Embedded Systems archive
Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems. Pages: 223 - 233. 2006.
